Method and apparatus for an active negative-capacitor circuit to cancel the input capacitance of comparators
US9264056B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 29, 2015 |
| Grant date | Feb 16, 2016 |
| Priority date | — |
| Expiry date | Mar 29, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/0836
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The differential output of a Programmable Gain Amplifier (PGA) is loaded by the input differential gate capacitance of a plurality of Analog to Digital convertors (ADC) comparators and the differential metal layer traces to interconnect these comparators to the PGA. The differential capacitive load presented to the PGA is quite large and reduces the bandwidth of this interconnect between the PGA and ADC. To overcome the performance degradation due to the differential capacitive load, an active negative-capacitor circuit cancels the effect of the large input capacitance of the ADC comparators. This cancelation extends the gain characteristics of the interconnect between the PGA's output and the inputs of the first stage of the comparators. The active negative-capacitance is comprised of a cross pair NMOS with a capacitor connecting their sources where each NMOS is biased by a current source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.