Integrated circuit device methods and models with predicted device metric variations
US9268885B1 · kind B1 · utility
2Cited by
414References
12Claims
0Family size
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Key dates
| Filing date | Feb 28, 2013 |
| Grant date | Feb 23, 2016 |
| Priority date | — |
| Expiry date | Jul 22, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method can include selecting integrated circuit (IC) device fabrication process source variations; generating relationships between each process source variance and a device metric variance; and calculating at least one IC device metric value from the process source variations and corresponding relationships between each process source variance and a device metric variance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.