Bonded semiconductor structure with SiGeC/SiGeBC layer as etch stop
US9269608B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 30, 2015 |
| Grant date | Feb 23, 2016 |
| Priority date | — |
| Expiry date | Mar 30, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/798
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure is formed with a first wafer (e.g. a handle wafer) and a second wafer (e.g. a bulk silicon wafer) bonded together. The second wafer includes an active layer, which in some embodiments is formed before the two wafers are bonded together. A substrate is removed from the second wafer on an opposite side of the active layer from the first wafer using a SiGeC or SiGeBC layer as an etch stop. In some embodiments, the SiGeC or SiGeBC layer is formed by epitaxial growth, ion implantation or a combination of epitaxial growth and ion implantation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.