Integrated circuit comprising components, for example NMOS transistors, having active regions with relaxed compressive stresses
US9269771B2 · kind B2 · utility
6Cited by
7References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2015 |
| Grant date | Feb 23, 2016 |
| Priority date | — |
| Expiry date | Feb 20, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a substrate and at least one component unfavorably sensitive to compressive stress which is arranged at least partially within an active region of the substrate limited by an insulating region. To address compressive stress in the active region, the circuit further includes at least one electrically inactive trench located at least in the insulating region and containing an internal area configured to reduce compressive stress in the active region. The internal area is filled with polysilicon. The polysilicon filled trench may further extend through the insulating region and into the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.