Method for the radiation hardening of an electronic circuit by partitioning
US9270271B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2013 |
| Grant date | Feb 23, 2016 |
| Priority date | — |
| Expiry date | Nov 29, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2117/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The method relates to a method for the radiation hardening of an electronic circuit by partitioning, said circuit including an odd number K of parallel branches connected to a same primary input I and each including a same series of N modules and N−1 nodes linking two consecutive modules, the K branches together forming a series of N−1 gates respectively consisting of parallel K nodes, and a primary arbiter forming a majority vote from the output signal of the K branches, the method being characterized in that it includes the following steps which are repeated for each one of the gates: determining a reliability of a subcircuit upstream from the gate consisting of the portions of the K branches located between the primary input and the gate, and the insertion of at least one arbiter at the gate forming a majority vote from the output signals of said portions of branches constituting the scanned subcircuit and outputting at least one majority signal to the respective inputs of an additional subcircuit formed by the branch portions downstream from the gate, if the reliability of the scanned subcircuit is less than a reliability set point.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.