Hardware-assisted integrity monitor
US9270697B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2014 |
| Grant date | Feb 23, 2016 |
| Priority date | — |
| Expiry date | Aug 22, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2105
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hardware-assisted integrity monitor may include one or more target machines and/or monitor machines. A target machine may include one or more processors, which may include one or more system management modes (SMM). A SMM may include one or more register checking modules, which may be configured to determine one or more current CPU register states. A SMM may include one or more acquiring modules, which may be configured to determine one or more current memory states. A SMM may include one or more network modules, which may be configured to direct one or more communications, for example of one or more current CPU register states and/or current memory states, to a monitor machine. A monitor machine may include one or more network modules and/or analysis modules. An analysis module may be configured to determine memory state differences and/or determine CPU register states differences.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.