Semiconductor integrated circuit
US9274583B2 · kind B2 · utility
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Key dates
| Filing date | Aug 26, 2009 |
| Grant date | Mar 1, 2016 |
| Priority date | — |
| Expiry date | May 3, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E60/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit includes a central processing unit 21 the operation of which is stopped or slowed down in a sleep mode; an edge detection unit 23 detecting an edge of an interrupt signal supplied from the outside and generating an edge detection signal; and a data holding unit 22 holding data supplied from the outside when the edge detection signal is received. The central processing unit 21 reads the data held by the data holding unit 22 after returning from the sleep mode to an active mode in response to the interrupt signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.