Multi-processor device and inter-process communication method thereof
US9274860B2 · kind B2 · utility
2Cited by
3References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 18, 2011 |
| Grant date | Mar 1, 2016 |
| Priority date | — |
| Expiry date | Oct 29, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/544
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a multi-process device and an inter-process communication (IPC) method thereof. The multi-processor device includes a first processor, a second processor, a first memory connected to the first processor, and a second memory connected to the second processor. When an inter-process communication (IPC) operation is performed between the first processor and the second processor, data is exchanged between the first memory and the second memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.