Patent · US Active

Memory systems including nonvolatile buffering and methods of operating the same

US9274983B2 · kind B2 · utility

0Cited by
5References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateJul 9, 2014
Grant dateMar 1, 2016
Priority date
Expiry dateJul 9, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/385
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A nonvolatile memory system can include a nonvolatile memory device that can be configured to store data and a nonvolatile memory buffer circuit that can be configured to store data of a type that is predetermined to be flushed to the nonvolatile memory device in a sudden power off backup operation of the nonvolatile memory system, whereas a volatile memory buffer circuit can be configured to store other data of a type that is not to be flushed to the nonvolatile memory device in the sudden power off backup operation of the nonvolatile memory system. A memory controller can be coupled to the nonvolatile memory device, the nonvolatile memory buffer circuit, and to the volatile memory buffer circuit, where the memory controller can be configured to store received data or processed data in the nonvolatile memory buffer circuit responsive to determining that the received data or processed data is of the type that is predetermined to be flushed to the nonvolatile memory device in the sudden power off backup operation of the nonvolatile memory system.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.