Identifying logical planes formed of compute nodes of a subcommunicator in a parallel computer
US9275007B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2013 |
| Grant date | Mar 1, 2016 |
| Priority date | — |
| Expiry date | Jan 7, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/80
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a parallel computer, a plurality of logical planes formed of compute nodes of a subcommunicator may be identified by: for each compute node of the subcommunicator and for a number of dimensions beginning with a first dimension: establishing, by a plane building node, in a positive direction of the first dimension, all logical planes that include the plane building node and compute nodes of the subcommunicator in a positive direction of a second dimension, where the second dimension is orthogonal to the first dimension; and establishing, by the plane building node, in a negative direction of the first dimension, all logical planes that include the plane building node and compute nodes of the subcommunicator in the positive direction of the second dimension.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.