Timing error detector with diversity loop detector decision feedback
US9275655B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2013 |
| Grant date | Mar 1, 2016 |
| Priority date | — |
| Expiry date | Jul 13, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2220/2516
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Aspects of the disclosure pertain to an apparatus for detecting timing errors including an analog to digital converter circuit, a diversity loop detector and a timing error calculation circuit. The analog to digital converter circuit is operable to convert an input signal into a series of digital samples. The diversity loop detector is operable to apply a data detection algorithm to a plurality of signals derived from the series of digital samples at different phase offsets, to select one of the phase offsets, and to yield a detected output with the selected phase offset. The timing error calculation circuit is operable to calculate a timing error of the analog to digital converter circuit based at least in part on the selected phase offset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.