Methods of manufacturing semiconductor devices
US9276058B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2015 |
| Grant date | Mar 1, 2016 |
| Priority date | — |
| Expiry date | Jun 5, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/318
Abstract
A semiconductor device includes a plurality of lower electrodes on a substrate, with each of the lower electrodes extending in a height direction from the substrate and including sidewalls, the lower electrodes being spaced apart from each other in a first direction and in a second direction, a plurality of first supporting layer patterns contacting the sidewalls of the lower electrodes, the first supporting layer patterns extending in the first direction between ones of the lower electrodes adjacent in the second direction, a plurality of second supporting layer patterns contacting the sidewalls of the lower electrodes, the second supporting layer pattern extending in the second direction between ones of the lower electrodes adjacent in the first direction, the plurality of second supporting layer patterns being spaced apart from the plurality of first supporting layer patterns in the height direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.