Semiconductor device having a gate recess structure

US9276100B2 · kind B2 · utility

Assignee

• FUJITSU LIMITED · JP

Inventors

• Hiroshi Endo · Tokyo, JP
• Toshihiro Ohki · Hadano, JP
• Toshihide Kikkawa · Kawasaki, JP

Key dates

• Filing date: Nov 11, 2011
• Grant date: Mar 1, 2016
• Expiry date: Oct 1, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/8503

Abstract

A semiconductor device includes a first semiconductor layer disposed over a substrate, a second semiconductor layer disposed over the first semiconductor layer, a gate recess disposed, through removal of a part of or all the second semiconductor layer, in a predetermined region over the first semiconductor layer, an insulating film disposed over the gate recess and the second semiconductor layer, a gate electrode disposed over the gate recess with the insulating film therebetween, and a source electrode and a drain electrode disposed over the first semiconductor layer or the second semiconductor layer, whereby a central portion of the gate recess is higher than a peripheral portion of the gate recess.