Fast normalization in a mixed precision floating-point unit
US9280316B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2014 |
| Grant date | Mar 8, 2016 |
| Priority date | — |
| Expiry date | May 13, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/3808
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hardware circuit for returning single precision denormal results to double precision. A hardware circuit component configured to count leading zeros of an unrounded single precision denormal result. A hardware circuit component configured to pre-compute a first exponent and a second exponent for the unrounded single precision denormal result. A hardware circuit component configured to perform a second normalization of the rounded single precision denormal result back to architected format.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.