Semiconductor device and method of manufacturing the same
US9281362B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2014 |
| Grant date | Mar 8, 2016 |
| Priority date | — |
| Expiry date | May 23, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/42
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to an example embodiment, a semiconductor device includes a substrate having a cell array region and a peripheral circuit region. The substrate includes first active regions defined by a first trench isolation region in the cell array region, a second active region defined by a second trench isolation region in the peripheral circuit region, and at least one deep trench isolation region. The first active regions may be aligned to extend longitudinally in a first direction in the cell array region. The at least one deep trench isolation region is recessed in the substrate to a level lower than those of other points of a bottom surface of the second trench isolation region in the peripheral circuit region. The at least one deep trench isolation region includes at least one point that is spaced apart in the first direction from a corresponding one of the first active regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.