Dynamic random access memory (DRAM) and production method, semiconductor packaging component and packaging method
US9287268B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2014 |
| Grant date | Mar 15, 2016 |
| Priority date | — |
| Expiry date | Jun 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A dynamic random access memory (DRAM) and a production method, a semiconductor packaging component and a packaging method. The production method comprises: providing a memory wafer, the memory wafer being provided with a memory bare chip which is provided with a top metal layer which is provided with a power source bonding pad, a signal bonding pad, and a micro bonding pad, and an internal bus led out of the memory bare chip being electrically connected to the micro bonding pad; repairing the memory wafer; if a yield of the memory wafer is greater than or equal to a preset threshold, rearranging the micro bonding pad to form a butt-joint bonding pad which is electrically connected to the micro bonding pad and the power source bonding pad. A structure of the DRAM is not significantly changed, a data bandwidth of the DRAM is increased, and a high yield is ensured.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.