Distortion tolerant processing
US9287326B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2014 |
| Grant date | Mar 15, 2016 |
| Priority date | — |
| Expiry date | Sep 19, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An integrated circuit (IC) for driving a flexible display includes a first layer including spatially non-repetitive features, the first layer deposited on a flexible substrate, the spatially non-repetitive features not substantially regularly repeating in both of two orthogonal directions (x,y) in the plane of the substrate. The IC further includes a second layer including spatially repetitive features with the second layer being deposited on said first layer. The first and second layers are aligned to one another so as to allow electrical coupling between said non-repetitive and said repetitive features, and wherein distortion compensation is applied during deposition of said repetitive features to enable said alignment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.