Three-mode high-speed level up shifter circuit
US9287871B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 16, 2014 |
| Grant date | Mar 15, 2016 |
| Priority date | — |
| Expiry date | May 10, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/003
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention disclose a level up shifter circuit. The level up shifter circuit further includes two field effect transistors connected in series and a control circuit. Sources of the two field effect transistors and a source of a sixth field effect transistor are respectively connected to a drain of a first field effect transistor and a drain of a second field effect transistor of the conversion circuit, and the control circuit is turned on when a first voltage signal and a third voltage signal are zero at the same time and is turned off in other situations. The level up shifter circuit according to the embodiments of the present invention can effectively solve the problem that an output state is unknown.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.