Circuits for efficient detection of vector signaling codes for chip-to-chip communication using sums of differences
US9288082B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2013 |
| Grant date | Mar 15, 2016 |
| Priority date | — |
| Expiry date | Jul 26, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/03789
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In a detection circuit, inputs correspond to received indications of vector signaling code words received by a first integrated circuit from a second integrated circuit. With four inputs, the circuit compares a first pair to obtain a first difference result and compares a second pair, disjoint from the first pair, to obtain a second difference result. The first and second difference results are then summed to form an output function. A system might use a plurality of such detection circuits to arrive at an input word. The circuit can include amplification, equalization, and input selection with efficient code word detection. The vector signaling code can be a Hadamard matrix code encoding for three input bits. The circuit might also have frequency-dependent gain, a selection function that directs one of the summation function result or the first difference result to the output function, variable gain, and/or a slicer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.