Patent · US Active

Verifying the functionality of an integrated circuit

US9288161B2 · kind B2 · utility

0Cited by

5References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Matayambath Roopesh Ambalath · Bengaluru, IN
Carsten Greiner · Holzgerlingen, DE
Senthil K. Jayaraj · Bengaluru, IN
Juergen Ruf · Lörrach, DE

Key dates

Filing date	Nov 26, 2012
Grant date	Mar 15, 2016
Priority date	—
Expiry date	May 28, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH04L43/50
WIPO fieldDigital communication
WIPO sectorElectrical engineering

Abstract

Verifying the functionality of an integrated circuit, the integrated circuit being operable for processing a data packet thereby generating a data processing result. A data packet to be processed is evaluated to determine if the data packet is an erroneous data packet. If the data packet is identified as an erroneous data packet, a modified data packet is generated by modifying the erroneous data packet and providing the modified data packet to the integrated circuit. A determination is made as to whether the data processing result comprises the modification; and a malfunction of the integrated circuit is signaled, if the data processing result comprises the modification.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.