Patent · US Active

Debug system, apparatus and method thereof for providing graphical pin interface

US9291672B2 · kind B2 · utility

0Cited by

9References

26Claims

0Family size

Assignee

NUVOTON TECHNOLOGY CORPORATION · TW

Inventors

Xiaohui Chen · Changzhou City, CN
Xiaocheng Shen · Shanghai, CN

Key dates

Filing date	Mar 15, 2013
Grant date	Mar 22, 2016
Priority date	—
Expiry date	Mar 15, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG01R31/31705
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

A debug apparatus for debugging a chip under test with a plurality of pins is provided. The debug apparatus includes a processor for controlling the chip under test via a bridge device. The processor provides graphical data to indicate pin states of the chip under test when the chip under test is controlled by the processor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.