Fast recalibration circuitry for input/output (IO) compensation finite state machine power-down-exit
US9292076B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2013 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | May 29, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Fast recalibration circuitry for input/output (IO) compensation finite state machine power-down exit is described. The fast recalibration circuitry includes a finite state machine having a volatile memory to store an IO compensation setting and a power supply coupled to the volatile memory to provide power to the volatile memory. The fast recalibration circuitry includes a persistent memory coupled to the volatile memory and one or more circuits, coupled to the volatile memory and the persistent memory, to identify an event to enter a power-down mode, wherein the power-down mode comprises the power supply removing power from the volatile memory and transfer the IO compensation setting in the volatile memory to the persistent memory prior to the power supply removing the power from the volatile memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.