Method of scheduling loops for processor having a plurality of functional units
US9292287B2 · kind B2 · utility
2Cited by
6References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2014 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | Jul 14, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is a loop scheduling method including scheduling a first loop using execution units, and scheduling a second loop using execution units available as a result of the scheduling of the first loop. An n-th loop (n>2) may be scheduled using a result of scheduling an (n−1)-th loop, similar to the (n−1)-th loop. The first loop may be a higher priority loop than the second loop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.