Thread processing on an asymmetric multi-core processor
US9292356B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2013 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | Jan 26, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An ASMP computing device is provided, which comprises one or more computing components, which themselves comprise a plurality of processing units and one or more memory devices that are communicatively coupled to the one or more computing components, Stored on the memory devices are first and second processing frequency data. The first processing frequency data comprise a synchronization frequency, which comprises a frequency for application to all online processing units when a measured highest load of any online processing unit is greater than a first ramp-up processor load threshold and an operating frequency of the online processing unit is lower than the synchronization frequency. The second processing frequency data comprises a ramp-up frequency, the ramp-up frequency comprising a frequency for application to any online processing unit when a measured processing load of any online processing unit is greater than a second ramp-up processing load threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.