Method and apparatus for detecting an output power of a radio frequency transmitter using a multiplier circuit
US9292716B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2015 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | Mar 26, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/0043
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power detection circuit configured to detect an output power of a radio frequency transmitter. The power detection circuit includes a multiplier circuit configured to multiply a first differential input signal and a second differential input signal. The first differential input signal corresponds to a radio frequency signal to be amplified by the radio frequency transmitter. The second differential signal corresponds to an output signal as amplified by an amplifier of the radio frequency transmitter. A bias circuit is configured to generate a bias signal. A differential amplifier is configured to generate, based on the bias signal and the first differential signal and the second differential signal as multiplied by the multiplier circuit, an indication of the output power of the amplifier of the radio frequency transmitter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.