Pixel circuit and display
US9293083B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Dec 10, 2013 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | Dec 10, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/06
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A pixel circuit and a display, wherein the pixel circuit includes: a first pixel sub-circuit and a second pixel sub-circuit, as well as an initialization module and a data voltage writing module connected to the first pixel sub-circuit and the second pixel sub-circuit; wherein the initialization module is connected to a reset signal terminal and a low potential terminal, and is used to initialize the first pixel sub-circuit and the second pixel sub-circuit under a control of a reset signal inputted from the reset signal terminal; the data voltage writing module is connected to a data signal line and a gate signal terminal, and is used to firstly write a first data voltage to the first pixel sub-circuit and the second pixel sub-circuit under a control of a signal inputted from the gate signal terminal and to compensate for a driving module of the second pixel sub-circuit, and then to write a second data voltage to the first pixel sub-circuit and compensate for a driving module of the first pixel sub-circuit. The pixel circuit and the display can reduce a size of pixel circuit, so as to further reduce a pixel pitch, increase the number of the pixels contained in per unit area and imp…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.