Semiconductor memory device having OTP cell array
US9293218B2 · kind B2 · utility
1Cited by
2References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 9, 2013 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | Jan 2, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is a semiconductor memory device. The semiconductor includes a One Time Programmable (OTP) cell array, a converging circuit and a sense amplifier circuit. The OTP cell array includes a plurality of OTP cells connected to a plurality of bit lines, each bit line extending in a first direction. The converging includes a common node contacting a first bit line and a second bit line. The sense amplifier circuit includes a sense amplifier connected to the common node, the sense amplifier configured to amplify a signal of the common node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.