Circuit and method for biasing a gallium arsenide (GaAs) power amplifier
US9294055B2 · kind B2 · utility
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31References
20Claims
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Key dates
| Filing date | Sep 27, 2013 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | Apr 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for biasing a gallium arsenide (GaAs) power amplifier includes a reference voltage generator circuit implemented in a gallium arsenide (GaAs) material system, a field effect transistor (FET) bias circuit implemented in the gallium arsenide material system and adapted to receive an output of the reference voltage generator circuit and adapted to provide an output to a radio frequency (RF) amplifier stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.