High-frequency signal processing device and wireless communication system
US9294264B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 24, 2014 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | Nov 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0087
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
To reduce the influence of a spurious in a high-frequency signal processing device and a wireless communication system each provided with a digital type PLL circuit. In a digital type PLL circuit including a digital phase comparator unit, a digital low-pass filter, a digital control oscillator unit, and a multi-module driver unit (frequency divider unit), the clock frequency of a clock signal in the digital phase comparator unit is configured selectably among a plurality of options. The clock frequency is selected among frequencies which are integer multiples of a reference frequency, in accordance with which frequency band of a standard is to be set for an oscillation output signal of the digital control oscillator unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.