Image sensor including data transmission circuit having split bus segments
US9294703B2 · kind B2 · utility
3Cited by
13References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 3, 2013 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | May 9, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A data transmission circuit of an image sensor includes first to Kth bus segments, and first to Kth data regeneration circuits respectively connected to the first to Kth bus segments and the first to (K−1)th data regeneration circuits respectively connected to the second to Kth bus segments. Each of the first to Kth data regeneration circuits may be embodied as one of a buffer, a logic gate, and a synchronous circuit operating in response to a clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.