Method and apparatus for dynamically allocating memory address space between physical memories
US9298600B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2013 |
| Grant date | Mar 29, 2016 |
| Priority date | — |
| Expiry date | May 5, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/205
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory address space for each of a plurality of physical memories in a microprocessor-based system is allocated prior to knowing the desired logical size of at least one of the physical memories. At least two of the allocated memory address spaces overlap at least a portion of each other. After the system is fabricated, a pointer value set that corresponds to an address boundary between at least two physical memories of the fabricated system is set during boot time and/or during run time when the size of the physical memories are known. The technique provides a faster time-to-market for microprocessor-based systems by allowing, for example, Application Specific Integrated Circuits (ASICs) comprising microprocessor systems on-chip be manufactured prior to the final firmware and software being fully developed. Additionally, the subject matter disclosed herein permits changes in memory-space allocation for finalized ASIC designs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.