Padding for multi-channel memory
US9299124B2 · kind B2 · utility
1Cited by
13References
36Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2012 |
| Grant date | Mar 29, 2016 |
| Priority date | — |
| Expiry date | Jan 29, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques described in the disclosure are generally related to reserving padding bytes in system memory when storing data in the system memory. The reserving of padding bytes may allow a memory interface to efficiently utilize the channels to the system memory when storing or subsequently retrieving the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.