Receiver with channel estimation circuitry
US9300516B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2009 |
| Grant date | Mar 29, 2016 |
| Priority date | — |
| Expiry date | Oct 11, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0216
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The invention concerns receive circuitry for demodulating an input signal received from a transmission channel, the receive circuitry including a frequency interpolation filter arranged to provide channel estimations (Ĥn) of the entire channel, the frequency interpolation filter having at least one filter receiving the pilot frequency channel estimations and performing filtering based on a plurality (Q) of the pilot channel estimations at a time; and a memory arranged to store the filter coefficients for the at least one filter, the coefficients being based on a frequency-domain autocorrelation of a model of the transmission channel, the model representing the time distribution of the channel power of the transmission channel determined independently of the pilot frequency channel estimations, wherein said model is based on a χ2 distribution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.