Large receive offload functionality for a system on chip
US9300578B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2013 |
| Grant date | Mar 29, 2016 |
| Priority date | — |
| Expiry date | Jun 28, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/166
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Various aspects provide large receive offload (LRO) functionality for a system on chip (SoC). A classifier engine is configured to classify one or more network packets received from a data stream as one or more network segments. A first memory is configured to store one or more packet headers associated with the one or more network segments. At least one processor is configured to receive the one or more packet headers and generate a single packet header for the one or more network segments in response to a determination that a gather buffer that stores packet data for the one or more network segments has reached a predetermined size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.