Hierarchical flash translation layer
US9304904B2 · kind B2 · utility
2Cited by
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15Claims
0Family size
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Key dates
| Filing date | Oct 30, 2013 |
| Grant date | Apr 5, 2016 |
| Priority date | — |
| Expiry date | Apr 18, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0804
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flash memory system comprises a flash device operable to store data in a plurality of physical blocks assigned to a plurality of sections, a plurality of Flash Translation Tables stored in a memory comprising a Forward Translation Table that maps a Section to a plurality of physical blocks, and a Sector Translation Table for each Section, the Sector Translation Table operable to map to a Physical Page Number identifying a particular Page, a Page Offset identifying a particular location within the Page, and a Section Local Block Table comprising Block Physical Addresses indexed by a Section Local Block Table ID.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.