Array substrate, display device and method for controlling refresh rate
US9305512B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 8, 2013 |
| Grant date | Apr 5, 2016 |
| Priority date | — |
| Expiry date | May 30, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2340/0435
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention discloses array substrate, display device and method for controlling refresh rate of an array substrate. The array substrate includes; a plurality of pixel structures each including gate line, data line, common electrode line, first switching element at intersection of the gate line and the data line, pixel electrode, second switching element, and first transparent electrode. Gate, source and drain of the first switching element are connected to the gate line, the date line and the pixel electrode, respectively. Gate, source and drain of the second switching element are connected to second switching controlling line, common electrode signal terminal and the first transparent electrode, respectively. A first storage capacitance is formed between the pixel electrode and the common electrode line and/or between the pixel electrode and the gate line, and a second storage capacitance is formed between the pixel electrode and the first transparent electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.