Silicon carbide semiconductor device
US9306006B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2015 |
| Grant date | Apr 5, 2016 |
| Priority date | — |
| Expiry date | Jul 20, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/127
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
There is provided a silicon carbide semiconductor device allowing for suppression of breakage of an element upon short circuit of load. A MOSFET includes a silicon carbide layer, a gate insulating film, a gate electrode, a source electrode, and a drain electrode. The silicon carbide layer includes a drift region, a body region, and a source region. The MOSFET is configured such that a relational expression of n<−0.02RonA+0.7 is established in a case where a contact width of the source region and the source electrode is represented by n (μm) in a cross section in a thickness direction of the silicon carbide layer and a migration direction of carriers in the body region and where on resistance of the MOSFET in a state in which an inversion layer is formed in a channel region is represented by RonA (mΩcm2).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.