Output buffer, gate electrode driving circuit and method for controlling the same
US9306572B2 · kind B2 · utility
2Cited by
3References
11Claims
0Family size
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Key dates
| Filing date | Jul 15, 2014 |
| Grant date | Apr 5, 2016 |
| Priority date | — |
| Expiry date | Jul 15, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09429
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present disclosure discloses an output buffer, a gate electrode driving circuit and a method for controlling the same. The output buffer includes a first transistor, a second transistor and an input signal control unit. The input signal control unit controls an input signal to obtain a pull-up signal and a pull-down signal, which are input to input terminals of the first transistor and the second transistor, respectively. The above output buffer uses the input signal control unit to divide one input signal into two signals, i.e., the pull-up signal and the pull-down signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.