Systems and methods for computation-efficient image processing system architecture
US9307119B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 16, 2012 |
| Grant date | Apr 5, 2016 |
| Priority date | — |
| Expiry date | Sep 8, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N1/56
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Embodiments relate to systems and methods for a computation-efficient image processing system architecture. Image data can be transmitted from a computer, online service, and/or other image source to an output device having a set of image processing modules in two or more image paths, including an edge detection module and a video decoding module. The edge detection module can produce edge tag output, and the video decoding module, operating in parallel, can generate decoded video output. The edge tag output and decoded video output can be transmitted to a set of downstream image processing modules, including modules for color trapping, edge smoothing, and other operations. Because earlier processing stages share information with downstream modules which require the same or related data, redundant processing can be reduced or eliminated. Complex image operations can therefore be carried out, and high-quality output can be generated, without sacrificing responsiveness.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.