Electronic apparatus and BIOS updating apparatus thereof
US9311075B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2012 |
| Grant date | Apr 12, 2016 |
| Priority date | — |
| Expiry date | Aug 3, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/656
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic apparatus including a central processing unit (CPU), a chipset, a first interface circuit, a temporary memory, a BIOS (basic input/output system) memory, a second interface circuit and a first switcher is provided. The chipset is coupled to the CPU and the first switcher. The temporary memory is coupled to the first switcher and the first interface circuit. The first interface circuit is coupled to the electronic apparatus and an extended storage including a first BIOS. The second interface circuit is coupled to the first switcher and the BIOS memory. If the first BIOS is stored in the temporary memory, the temporary memory is coupled to the chipset by the first switcher; if the first BIOS is not stored in the temporary memory, the second interface circuit is coupled to the chipset by the first switcher. The electronic device can safely updates the BIOS.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.