Patent · US Active

Delaying interrupts for a transactional-execution facility

US9311137B2 · kind B2 · utility

0Cited by
6References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 28, 2012
Grant dateApr 12, 2016
Priority date
Expiry dateFeb 5, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/528
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A mechanism is provided for completing of set of instructions while receiving interrupts. The mechanism executes a set of instructions. Responsive to receiving an interrupt and determining that the interrupt requires processing within an implementation time frame, the mechanism delays the interrupt for a predetermined time period. Responsive to completing the set of instructions within the predetermined time period, the mechanism processes the interrupt.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.