Bi-synchronous electronic device and FIFO memory circuit with jump candidates and related methods
US9311975B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2014 |
| Grant date | Apr 12, 2016 |
| Priority date | — |
| Expiry date | Oct 7, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2205/102
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bi-synchronous electronic device may include a FIFO memory circuit, and a first digital circuit coupled to the FIFO memory circuit and configured to operate based upon a first clock signal, and write to the FIFO memory circuit based upon a write pointer. The bi-synchronous electronic device may include second digital circuit coupled to the FIFO memory circuit and configured to operate based upon a second clock signal different from the first clock signal, and read from the FIFO memory circuit based upon a read pointer. The FIFO memory circuit may be configured to detect a jump in the write pointer to a new position, determine jump candidates for the read pointer from a current position, select a jump candidate, and synchronize the read pointer based upon the selected jump candidate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.