Method of joining semiconductor substrate
US9312227B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2014 |
| Grant date | Apr 12, 2016 |
| Priority date | — |
| Expiry date | Jul 29, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/10155
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of joining semiconductor substrates, which may include: forming an alignment key on a first semiconductor substrate; forming an insulating layer on the first semiconductor substrate and the alignment key; forming a first metal layer pattern and a second metal layer pattern on the insulating layer; forming a first protrusion and a second protrusion, and an alignment recess positioned between the first protrusion and the second protrusion on a second semiconductor substrate; forming a third metal layer pattern and a fourth metal layer pattern on the first protrusion and the second protrusion, respectively; and joining the first semiconductor substrate and the second semiconductor substrate, in which the alignment key is positioned at the alignment recess when the first semiconductor substrate and the second semiconductor substrate are joined, is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.