Semiconductor metal insulator metal capacitor device and method of manufacture
US9312325B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 6, 2015 |
| Grant date | Apr 12, 2016 |
| Priority date | — |
| Expiry date | Apr 6, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor device includes forming a capacitor bottom plate and a metal interconnect feature on a substrate. A dielectric layer having a predetermined thickness is then formed. The dielectric layer has a first portion overlying the capacitor bottom plate and a second portion overlying the metal interconnect feature. A thickness of the first portion of the dielectric layer is adjusted by either reducing the thickness or depositing additional dielectric material. A capacitor top plate is formed over the first portion of the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.