Electronic device displays with border masking layers
US9312517B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2014 |
| Grant date | Apr 12, 2016 |
| Priority date | — |
| Expiry date | Sep 11, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/12
Abstract
An electronic device may be provided with a display. The display may have an active area with an array of display pixels and an inactive border region containing metal lines and other support circuitry. The array of display pixels may be formed from organic light-emitting diode structures in an organic-light-emitting diode layer. The display may also include an encapsulant layer on the organic light-emitting diode layer and a substrate layer. An opaque masking layer may be formed in the inactive border region. The opaque masking layer may overlap structures in the inactive border region such as the support circuitry, thereby blocking the support circuitry from view. The opaque masking layer may be formed a glass layer in the display, in part of a polarizer in a display, under a planarization layer, or between other layers in the display.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.