Packet preemption for low latency
US9313140B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2011 |
| Grant date | Apr 12, 2016 |
| Priority date | — |
| Expiry date | Oct 31, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/28
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
While transmitting a first Ethernet frame from the first buffer onto an Ethernet link, a first Ethernet device may stop transmitting the first frame prior to completing transmission of the frame. The first Ethernet device may then transmit a second frame from a second buffer onto the Ethernet link. The first Ethernet device may resume transmission of the first frame from the first buffer onto the Ethernet link. A second Ethernet device may receive, via the Ethernet link, a first portion of a first Ethernet frame and store the first portion of the first Ethernet frame in a first buffer. The second Ethernet device may then receive, via the Ethernet link, a second Ethernet frame and store the second Ethernet frame in a second buffer. The second Ethernet device may then receive, via the Ethernet link, a second portion of the first Ethernet frame and append it to the contents of the first buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.