Shift register unit and gate driving circuit
US9318067B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Apr 16, 2013 |
| Grant date | Apr 19, 2016 |
| Priority date | — |
| Expiry date | Sep 10, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/00
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit and a gate driving circuit are configured to reduce size of the shift register unit and meanwhile to provide a stable output signal. The shift register unit includes: an input unit configured to supply an input signal to an output unit in response to the input signal; the output unit configured to supply a first clock signal to an output terminal in response to a voltage at the first node; a pull-up unit configured to supply the first clock signal to the first node in response to the voltage at the first node; a pull-down control unit configured to supply the first clock signal, a second clock signal and a negative voltage of a power supply to the pull-down unit in response to the first clock signal, the second clock signal and the voltage at the first node; and the pull-down unit configured to supply the negative voltage of the power supply to the first node and the output terminal in response to a voltage at the second node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.