Semiconductor device having dummy cell array
US9318477B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2014 |
| Grant date | Apr 19, 2016 |
| Priority date | — |
| Expiry date | Sep 23, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is disclosed. The semiconductor device includes a plurality of dummy gate lines parallel to each other in a first direction and extending in a second direction that is orthogonal to the first direction; a plurality of first dummy filling patterns between the plurality of dummy gate lines, the first dummy filling patterns parallel to each other in the first direction, and arranged apart from each other in the second direction; a plurality of first dummy vias on the plurality of first dummy filling patterns; and a plurality of first dummy wiring lines connected to the plurality of first dummy vias, the first dummy vias extending in the second direction, and parallel to each other in the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.