Wafer level light-emitting diode array and method for manufacturing same
US9318530B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 6, 2013 |
| Grant date | Apr 19, 2016 |
| Priority date | — |
| Expiry date | Aug 6, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/857
Abstract
Disclosed are a light emitting diode array on a wafer level and a method of forming the same. The light emitting diode array includes a growth substrate; a plurality of light emitting diodes arranged on the substrate, wherein each of the plurality of light emitting diodes has a first semiconductor layer, an active layer and a second semiconductor layer; and a plurality of upper electrodes arranged on the plurality of light emitting diodes and formed of an identical material, wherein each of the plurality of upper electrodes is electrically connected to the first semiconductor layer of a respective one of the light emitting diodes. At least one of the upper electrodes is electrically connected to the second semiconductor layer of an adjacent one of the light emitting diodes, and another of the upper electrodes is insulated from the second semiconductor layer of an adjacent one of the light emitting diodes. Accordingly, it is possible to provide a light emitting diode array that can be driven under at a high voltage and simplify a forming process thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.