Semiconductor device and method for manufacturing semiconductor device
US9318577B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2014 |
| Grant date | Apr 19, 2016 |
| Priority date | — |
| Expiry date | May 22, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/0231
Abstract
A semiconductor device is provided, which includes a single crystal semiconductor layer formed over an insulating surface and having a source region, a drain region, and a channel formation region, a gate insulating film covering the single crystal semiconductor layer and a gate electrode overlapping with the channel formation region with the gate insulating film interposed therebetween. In the semiconductor device, at least the drain region of the source and drain regions includes a first impurity region adjacent to the channel formation region and a second impurity region adjacent to the first impurity region. A maximum of an impurity concentration distribution in the first impurity region in a depth direction is closer to the insulating surface than a maximum of an impurity concentration distribution in the second impurity region in a depth direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.